Titlebook: Correct Hardware Design and Verification Methods; 10th IFIP WG10.5 Adv Laurence Pierre,Thomas Kropf Conference proceedings 1999 Springer-Ve

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Formal Synthesis at the Algorithmic Levelthodology to formally derive register-transfer structures from descriptions at the algorithmic level via program transformations. Some experimental results at the end of the paper show how the run-time complexity of the synthesis process in our approach could be.

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Verification of Infinite State Systems by Compositional Model Checkingby model checking of systems with unbounded resources and uninterpreted functions. The method is illustrated by application to an implementation of Tomasulo’s algorithm, for arbitrary or infinite word size, register file size, number of reservation stations and number of execution units.

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Spike Diseases Caused by Viruses,marck’s method.We show that these railway systems share important characteristics which distinguish them from most hardware designs,and that these differences raise some doubts about the applicability of Stålmarck’s method to hardware verification.

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Using Symbolic Model Checking to Verify the Railway Stations of Hoorn-Kersenboogerd and Heerhugowaarmarck’s method.We show that these railway systems share important characteristics which distinguish them from most hardware designs,and that these differences raise some doubts about the applicability of Stålmarck’s method to hardware verification.

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