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Titlebook: Ultra-Low-Voltage Design of Energy-Efficient Digital Circuits; Nele Reynders,Wim Dehaene Book 2015 Springer International Publishing Switz

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发表于 2025-3-21 17:30:03 | 显示全部楼层 |阅读模式
书目名称Ultra-Low-Voltage Design of Energy-Efficient Digital Circuits
编辑Nele Reynders,Wim Dehaene
视频video
概述Provides a global overview and design methodology for ultra-low-voltage digital circuit design, covering all abstraction levels of digital design, from gate-level up to architecture-level recommendati
丛书名称Analog Circuits and Signal Processing
图书封面Titlebook: Ultra-Low-Voltage Design of Energy-Efficient Digital Circuits;  Nele Reynders,Wim Dehaene Book 2015 Springer International Publishing Switz
描述This book focuses on increasing the energy-efficiency of electronic devices so that portable applications can have a longer stand-alone time on the same battery. The authors explain the energy-efficiency benefits that ultra-low-voltage circuits provide and provide answers to tackle the challenges which ultra-low-voltage operation poses. An innovative design methodology is presented, verified, and validated by four prototypes in advanced CMOS technologies. These prototypes are shown to achieve high energy-efficiency through their successful functionality at ultra-low supply voltages.
出版日期Book 2015
关键词Energy-Efficient Digital Circuits; High Performance Integrated Circuit Design; Sub-Threshold Operation
版次1
doihttps://doi.org/10.1007/978-3-319-16136-5
isbn_softcover978-3-319-38608-9
isbn_ebook978-3-319-16136-5Series ISSN 1872-082X Series E-ISSN 2197-1854
issn_series 1872-082X
copyrightSpringer International Publishing Switzerland 2015
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发表于 2025-3-22 00:08:01 | 显示全部楼层
https://doi.org/10.1007/978-3-319-16136-5Energy-Efficient Digital Circuits; High Performance Integrated Circuit Design; Sub-Threshold Operation
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978-3-319-38608-9Springer International Publishing Switzerland 2015
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Ultra-Low-Voltage Design of Energy-Efficient Digital Circuits978-3-319-16136-5Series ISSN 1872-082X Series E-ISSN 2197-1854
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Gate-Level Building Blocks,only to operate at very low supply voltages in a variation-resilient manner, but also to function at speeds of . × 10 MHz. Such targets are only possible to achieve when attention is paid to both the transistor-level basic circuits and the architectural level. Careful design of logic gates is crucia
发表于 2025-3-23 01:36:46 | 显示全部楼层
Architectural Design,ovided for efficient and robust ultra-low-voltage functionality. This chapter starts with theoretical considerations on energy consumption, specifically for transistors operating in the weak inversion region and for circuits which are subjected to high variability. Next, the chapter explores archite
发表于 2025-3-23 08:26:05 | 显示全部楼层
Datapath Blocks,t of datapath blocks. Their target was to be able to operate at ultra-low supply voltages, while achieving high energy-efficiency, a speed of . × 10MHz and a high yield through variation-resilience. This chapter builds further upon the conclusions of the analyses of different gate-level building blo
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