Titlebook: Nanometer CMOS ICs; From Basics to ASICs Harry J.M. Veendrick Textbook 20172nd edition Springer International Publishing AG 2017 CMOS Nanoe

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Robustness of Nanometer CMOS Designs: Signal Integrity, Variability and Reliability,than by the transistor itself. Most of the potential electrical problems, such as cross-talk, critical timing, substrate bounce and clock skew, etc. are related to the signal propagation and/or high (peak) currents through these metal wires.

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Manufacture of MOS Devices,Until the mid-1980s, the nMOS silicon-gate process was the most commonly used process for MOS LSI and VLSI circuits. However, nearly all modern VLSI and memory circuits are made in CMOS processes. CMOS circuits are explained in Chap. 4; the technology used for their manufacture is discussed in this chapter.

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Very Large Scale Integration (VLSI) and ASICs,The continuing development of IC technology during the last couple of decades has led to a considerable increase in the number of devices per unit chip area. The resulting feasible IC complexity currently allows the integration of a complete ., which may comprise hundreds of millions to a few billion transistors.

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Testing, Yield, Packaging, Debug and Failure Analysis,Although this is almost the final chapter in this book, it does not mean that the topics discussed here are less important than those of the previous chapters.

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