Titlebook: Computer-Aided Verification; 2nd Internatonal Con Edmund M. Clarke,Robert P. Kurshan Conference proceedings 1991 Springer-Verlag Berlin Hei

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The use of model checking in ATPG for sequential circuits,s where the function implemented by the circuit is known. This paper shows how a test pattern may be generated while trying to disprove the equivalence of a good and a faulty machine. The algorithms are derived from Graph Theory and Model Checking. An example is analyzed to discuss the applicability and the cost of such an approach.

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Custom, Memory and the Authority of Writing, of states. We avoid separate consideration of execution sequences that do not differ in their partial order, and ensure termination by recording only a small number of system loop cutpoints — in the form of system .. In spite of the name, behavior states are not states.