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Titlebook: Computer-Aided Verification; 2nd Internatonal Con Edmund M. Clarke,Robert P. Kurshan Conference proceedings 1991 Springer-Verlag Berlin Hei

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书目名称Computer-Aided Verification
副标题2nd Internatonal Con
编辑Edmund M. Clarke,Robert P. Kurshan
视频video
丛书名称Lecture Notes in Computer Science
图书封面Titlebook: Computer-Aided Verification; 2nd Internatonal Con Edmund M. Clarke,Robert P. Kurshan Conference proceedings 1991 Springer-Verlag Berlin Hei
描述This volume contains the proceedings of the second workshopon Computer Aided Verification, held at DIMACS, RutgersUniversity, June 18-21, 1990. Itfeatures theoreticalresults that lead to new or more powerfulverificationmethods. Among these are advances in the use ofbinarydecision diagrams, dense time, reductions based upon partialorder representations and proof-checking in controllerverification. The motivation for holding a workshoponcomputer aided verification was to bring together work oneffectivealgorithms or methodologies for formalverification - as distinguished, say,from attributes oflogics or formal languages. The considerable interestgenerated by the first workshop, held in Grenoble, June1989(see LNCS 407), prompted this second meeting. The generalfocus of this volume is on the problem of making formalverification feasible forvarious models of computation.Specific emphasis is on models associatedwith distributedprograms, protocols, and digital circuits. The general testof algorithm feasibility is to embed it into a verificationtool,and exercise that tool on realistic examples: theworkshop included sessionsfor the demonstration of newverification tools.
出版日期Conference proceedings 1991
关键词Algorithms; Attribut; Session; algorithm; computer; formal language; formal languages; formal verification;
版次1
doihttps://doi.org/10.1007/BFb0023712
isbn_softcover978-3-540-54477-7
isbn_ebook978-3-540-38394-9Series ISSN 0302-9743 Series E-ISSN 1611-3349
issn_series 0302-9743
copyrightSpringer-Verlag Berlin Heidelberg 1991
The information of publication is updating

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0302-9743 verificationtool,and exercise that tool on realistic examples: theworkshop included sessionsfor the demonstration of newverification tools.978-3-540-54477-7978-3-540-38394-9Series ISSN 0302-9743 Series E-ISSN 1611-3349
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Temporal logic model checking: Two techniques for avoiding the state explosion problem,
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Compositional design and verification of communication protocols, using labelled petri nets,
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Conference proceedings 1991 models associatedwith distributedprograms, protocols, and digital circuits. The general testof algorithm feasibility is to embed it into a verificationtool,and exercise that tool on realistic examples: theworkshop included sessionsfor the demonstration of newverification tools.
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https://doi.org/10.1007/978-1-349-24834-6 the size of the RTCTL specification formula and in the size of the global state-space graph. Finally, we present an optimal, exponential time tableau-based decision procedure for the satisfiability of RTCTL formulae, which can be used as the basis of a technique to automate the synthesis of real-ti
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Formal verification of digital circuits using symbolic ternary system models,dition. By making this extension, we can model a wider range of circuit phenomena. We can also efficiently verify sequential circuits in which the effect of a given operation depends on only a subset of the total system state..This paper presents a formal methodology for verifying synchronous digita
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