Titlebook: Computer Engineering and Technology; 20th CCF Conference, Weixia Xu,Liquan Xiao,Zhenzhen Zhu Conference proceedings 2016 Springer Nature Si

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Weixia Xu,Liquan Xiao,Zhenzhen ZhuIncludes supplementary material:

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https://doi.org/10.1007/978-3-031-58124-3-precision/SIMD single-precision floating-point division and square root operation based on SRT-8 algorithm was introduced. Special instructions were designed and independent mantissa computing unit and normalization unit are implemented. Moreover, parallel adders and QDS structure was adopted to hi

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https://doi.org/10.1007/978-3-031-58124-3tware-Defined Radio (SDR) and is called SDR-DSP. The SDR-DSP architecture mixes the styles of VLIW (Very Long Instruction Word) and SIMD (Single Instruction Multiple Data). To explore the potential of SDR-DSP and achieve high performance, vectorization is one of the must equipped critical methods. B

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Opinions on Tax Evasion in Armeniascalability, high density and low leakage power. Nevertheless, the current non-volatile STT-RAM cache architecture also has some drawbacks, such as long write latency and high write energy, which limit the application of STT-RAM in the top level cache design. To solve these problems, we relax the re

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Robert W. McGee,Marcelo J. Rossiroblem making the performance improvement slow down. Therefore, how to optimize the power consumption of multi-core processor is a crisis in processor design. This paper proposes a dual-threshold adaptive DVFS algorithm to dynamically control the processor voltage and frequency. Comparing with tradi