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Titlebook: System-level Test and Validation of Hardware/Software Systems; Matteo Sonza Reorda,Zebo Peng,Massimo Violante Book 2005 Springer-Verlag Lo

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发表于 2025-3-21 18:22:56 | 显示全部楼层 |阅读模式
书目名称System-level Test and Validation of Hardware/Software Systems
编辑Matteo Sonza Reorda,Zebo Peng,Massimo Violante
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概述The reader will learn about the state of the art in system-level validation and test procedures which will enhance both the reliability and performance of system on chip designs
丛书名称Springer Series in Advanced Microelectronics
图书封面Titlebook: System-level Test and Validation of Hardware/Software Systems;  Matteo Sonza Reorda,Zebo Peng,Massimo Violante Book 2005 Springer-Verlag Lo
描述.New manufacturing technologies have made possible the integration of entire systems on a single chip. This new design paradigm, termed system-on-chip (SOC), together with its associated manufacturing problems, represents a real challenge for designers...SOC is also reshaping approaches to test and validation activities. These are beginning to migrate from the traditional register-transfer or gate levels of abstraction to the system level. Until now, test and validation have not been supported by system-level design tools so designers have lacked the infrastructure to exploit all the benefits stemming from the adoption of the system level of abstraction. Research efforts are already addressing this issue...This monograph provides a state-of-the-art overview of the current validation and test techniques by covering all aspects of the subject including:...modeling of bugs and defects;..stimulus generation for validation and test purposes (including timing errors;..design for testability..
出版日期Book 2005
关键词Hardware; Microelectronics; System-on-Chip; Validation; microprocessor; modeling; reliability; software; sys
版次1
doihttps://doi.org/10.1007/1-84628-145-8
isbn_softcover978-1-84996-953-6
isbn_ebook978-1-84628-145-7Series ISSN 1437-0387 Series E-ISSN 2197-6643
issn_series 1437-0387
copyrightSpringer-Verlag London 2005
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Test Generation: A Symbolic Approach,ymbolic ATPG is applied after a random-based ATPG, may represent a valuable solution to achieve a very high fault coverage keeping low the execution time. The testing methodology is implemented in a highly flexible functional verification framework that is based on a high-level fault model and a tes
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1437-0387 ...modeling of bugs and defects;..stimulus generation for validation and test purposes (including timing errors;..design for testability..978-1-84996-953-6978-1-84628-145-7Series ISSN 1437-0387 Series E-ISSN 2197-6643
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J. P. Teixeiraer, .Software Exorcism. discusses tools and techniques for effective and aggressive debugging, gives optimization strategies that appeal to all levels of programmers, and presents in-depth treatments of technical issues with honest assessments that are not biased toward proprietary solutions. .978-1-4302-5423-2978-1-4302-0788-7
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G. Jervan,R. Ubar,Z. Peng,P. Elesportantly the concept of a near miss is discussed. The proposed NMS lies at the intersection of failure analysis, digital forensics and near-miss analysis. The NMS focusses on the detection and prioritisation of near misses at runtime, during the operations and maintenance phase of a software system
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E. Sánchez,M. Sonza Reorda,G. Squillerohe aviation industry. Near-miss analysis when applied to software failure investigations can be challenging, especially with regard to the sheer volume of near misses. Much work has been performed to define a structured approach for near-miss analysis. One of the main components of such an approach
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I. G. Harrisrchase, and avoidance when risks are simply too high. Software failure risk assessment can provide the information to analyze functionality, financial, and project risks associated with failure due to faults in software. This information can modify the development process or suggest changes to syste
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