| 书目名称 | Synthesis of Power Distribution to Manage Signal Integrity in Mixed-Signal ICs | | 编辑 | Balsha R. Stanisic,Rob A. Rutenbar,L. Richard Carl | | 视频video | | | 图书封面 |  | | 描述 | In the early days of VLSI, the design of the power distribution for an integrated cir cuit was rather simple. Power distribution --the design of the geometric topology for the network of wires that connect the various power supplies, the widths of the indi vidual segments for each of these wires, the number and location of the power I/O pins around the periphery of the chip --was simple because the chips were simpler. Few available wiring layers forced floorplans that allowed simple, planar (non-over lapping) power networks. Lower speeds and circuit density made the choice of the wire widths easier: we made them just fat enough to avoid resistive voltage drops due to switching currents in the supply network. And we just didn‘t need enormous num bers of power and ground pins on the package for the chips to work. It‘s not so simple any more. Increased integration has forced us to focus on reliability concerns such as metal elec tromigration, which affects wire sizing decisions in the power network. Extra metal layers have allowed more flexibility in the topological layout of the power networks. | | 出版日期 | Book 1996 | | 关键词 | ASIC; Signal; algorithms; analog; computer-aided design (CAD); development; integrated circuit; modeling; ne | | 版次 | 1 | | doi | https://doi.org/10.1007/978-1-4613-1399-1 | | isbn_softcover | 978-1-4612-8606-6 | | isbn_ebook | 978-1-4613-1399-1 | | copyright | Kluwer Academic Publishers 1996 |
The information of publication is updating
|
|
发表于 2025-3-21 18:06:10
