Titlebook: Simulation of Semiconductor Processes and Devices 2004; Gerhard Wachutka,Gabriele Schrag Conference proceedings 2004 Springer-Verlag Wien

GOUGE

Modeling B Uphill Diffusion in the Presence of Ge,mples showed an increase in the B profile peak magnitude with anneal time, as well as its shift towards the surface. Control samples, receiving two Si implants, showed the expected enhanced B diffusion and none of the uphill diffusion behavior. Simulations accounting for the formation of GeB complex show qualitative fit to the measured profiles.

originality

FRET

antenna

Modeling of Stress Induced Layout Effect on Electrical Characteristics of Advanced MOSFETs,OSFETs on source/drain size is successfully modeled. In addition, with this procedure, the performance improvement with stress engineering such as modifying shallow trench isolation (STI) process and using nitride liner deposition on gate electrodes can be well reproduced.

occurrence

SOW

NEMO 1-D: the first NEGF-based TCAD tool,tool. Effects of quantum charging, bandstructure and incoherent scattering from alloy disorder, interface roughness, acoustic phonons, and polar optical phonons are modeled. Engineers and experimentalists who desire a black-box design tool as well as theorists who are interested in a detailed invest

小淡水鱼

Diuretic

,Full Band and Approximated Solutions of the Schrödinger Equation in Silicon Inversion layers,g to the 3D Full Band (FB) structure of silicon. For the first time, we explain the dependence of the eigenvalues on the momentum . in the plane of transport and discuss its periodicity. Furthermore, we discuss the solution of the SEQ around the energy minima, compare the Non-Parabolic model with th

burnish

A Hybrid 3D Quantum Mechanical Simulation of FinFETs and Nanowire Devices,el and 2-D Schrödinger equation in the confined cross section and provides insights into the performance of FinFETs with ultra small channel cross section. The simulation results of FinFETs show normal . characteristics with great potential in scalability even when the gate length is below 5 nm with

Expostulate