Titlebook: Simulation Techniques and Solutions for Mixed-Signal Coupling in Integrated Circuits; Nishath K. Verghese,Timothy J. Schmerbeck,David J. B

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Modeling Chip/Package Power Distribution,. Switching return currents take the path of least impedance which is often an on-chip path through the power rails. The presence of on-chip decoupling capacitance distributed on the bus can lessen the amount of bus fluctuation due to these switching currents. The simple discussion that follows assu

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Controlling Substrate Coupling in Heavily-Doped Bulk Processes,chip substrate as well as how it is tied to its assigned voltage potential on chip. Essentially every chip voltage transient on chip signal wires, I/O pads, and power rails is capacitively coupled to the chip substrate. This includes energy from card reflections back to I/O pads and transmitted to t

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Chip/Package Shielding and Good Circuit Design Practice,mission standards through-out the world. Violation of radiated emission specifications will usually occur well before the emissions start to functionally perturb the design itself. For radiated Class B designs that have clock frequencies exceeding 100Mhz the specification on the emissions envelope a

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A Design Example,drive. A 20mV read signal is variably amplified, sampled and equalized under digital control with maximum likelihood sequence detection. An analog AGC (Automatic Gain Control Amplifier), Buffer amplifiers, delay lines, multiple VCOs (Voltage Controlled Oscillator) and PLLs (Phase Locked Loop), D/As

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Nishath K. Verghese,Timothy J. Schmerbeck,David J. Allstot

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