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Titlebook: Sequential Logic Testing and Verification; Abhijit Ghosh,Srinivas Devadas,A. Richard Newton Book 1992 Springer Science+Business Media New

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书目名称Sequential Logic Testing and Verification
编辑Abhijit Ghosh,Srinivas Devadas,A. Richard Newton
视频video
丛书名称The Springer International Series in Engineering and Computer Science
图书封面Titlebook: Sequential Logic Testing and Verification;  Abhijit Ghosh,Srinivas Devadas,A. Richard Newton Book 1992 Springer Science+Business Media New
描述In order to design and build computers that achieve and sustain high performance, it is essential that reliability issues be considered care­ fully. The problem has several aspects. Certainly, considering reliability implies that an engineer must be able to analyze how design decisions affect the incidence of failure. For instance, in order design reliable inte­ gritted circuits, it is necessary to analyze how decisions regarding design rules affect the yield, i.e., the percentage of functional chips obtained by the manufacturing process. Of equal importance in producing reliable computers is the detection of failures in its Very Large Scale Integrated (VLSI) circuit components, caused by errors in the design specification, implementation, or manufacturing processes. Design verification involves the checking of the specification of a design for correctness prior to carrying out an implementation. Implementation verification ensures that the manual design or automatic synthesis process is correct, i.e., the mask-level description correctly implements the specification. Manufacture test involves the checking of the complex fabrication process for correctness, i.e., ensuring that ther
出版日期Book 1992
关键词Counter; RTL; VLSI; algorithms; computer; computer-aided design (CAD); integrated circuit; logic; manufactur
版次1
doihttps://doi.org/10.1007/978-1-4615-3646-8
isbn_softcover978-1-4613-6622-5
isbn_ebook978-1-4615-3646-8Series ISSN 0893-3405
issn_series 0893-3405
copyrightSpringer Science+Business Media New York 1992
The information of publication is updating

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https://doi.org/10.1007/978-1-4615-3646-8Counter; RTL; VLSI; algorithms; computer; computer-aided design (CAD); integrated circuit; logic; manufactur
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Introduction, design tool makes an error (probably due to an undetected bug). . is the process of determining whether the designed circuit is the same as what was specified. ., which is a part of implementation verification, is the process of verifying the equivalence of two logic-level circuits, usually the opt
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Verification of Sequential Circuits, the design process is sequential logic optimization. At this level, various techniques like retiming [79, 86], decomposition [7], optimization under don’t-cares [38, 80], and re-encoding [38] are used to transform the logic-level description of the circuit to a more optimal description. The focus o
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Book 1992entation. Implementation verification ensures that the manual design or automatic synthesis process is correct, i.e., the mask-level description correctly implements the specification. Manufacture test involves the checking of the complex fabrication process for correctness, i.e., ensuring that ther
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