Titlebook: Resilient Architecture Design for Voltage Variation; Vijay Janapa Reddi,Meeta Sharma Gupta Book 2013 Springer Nature Switzerland AG 2013

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Introduction,eature sizes shrink and chip designers attempt to reduce supply voltage to meet power targets in large multicore systems, parameter variations are becoming a serious problem. Parameter variations can be broadly classified as device variations incurred due to imperfections in the manufacturing proces

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Understanding the Characteristics of Voltage Variation,ss are subject to the selection process of benchmarks, and choosing a non-representative set of benchmarks may lead to biased observations, incorrect conclusions, and, eventually, designs that poorly match their target workloads.

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Predicting and Avoiding Voltage Emergencies,oduced by clock gating in the microprocessor were the primary reason for large voltage variation. Their recommended approach was to gradually activate and deactivate functional units as required to mitigate the large and sudden current fluctuations. Over recent years, more effort has been focused on

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Eliminiating Recurring Voltage Emergencies,e gracefully by a compiler. A hardware-based solution may repeatedly throttle, or roll back, on an emergency recurring at the same program location because it lacks global knowledge involving program structure and activity. In contrast, a compiler typically has several options when choosing the orde

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