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Titlebook: Languages and Compilers for Parallel Computing; 22nd International W Guang R. Gao,Lori L. Pollock,Xiaoming Li Conference proceedings 2010 S

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楼主: False-Negative
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DFT Performance Prediction in FFTW,ns. It is one of the fastest FFT libraries available and it outperforms many adaptive or hand-tuned DFT libraries. Its success largely relies on the huge search space spanned by several FFT algorithms and a set of compiler generated C code (called codelets) for small size DFTs. FFTW empirically find
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Hierarchical Place Trees: A Portable Abstraction for Task Parallelism and Data Movement,-level parallelism from the software. Exploitation of data locality is critical to achieving scalable parallelism, but adds a significant dimension of complexity to performance optimization of parallel programs. This is especially true for programming models where locality is implicit and opaque to
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Programming with Intervals,tervals can be statically analyzed to ensure that they do not deadlock or contain data races. In this paper, we demonstrate the flexibility of intervals by showing how to use them to emulate common parallel control-flow constructs like barriers and signals, as well as higher-level patterns such as b
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Adaptive and Speculative Memory Consistency Support for Multi-core Architectures with On-Chip Localobal memories. Software cache provides the user with a transparent view of the memory architecture and considerably improves the programmability of such systems. But this software approach can suffer from poor performance due to considerable overheads related to software mechanisms to maintain the m
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Synchronization-Free Automatic Parallelization: Beyond Affine Iteration-Space Slicing,n-space slicing framework to extract slices described by not only affine (linear) but also non-affine forms. A slice is represented by a set of dependent loop statement instances (iterations) forming an arbitrary graph topology. The algorithm generates an outer loop to spawn synchronization-free sli
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Automatic Data Distribution for Improving Data Locality on the Cell BE Architecture, power of the parallelism. This paper presents a single source compiler to map the data-parallel programs onto Cell Broadband Engine. Based on the distributed memory model, the compiler performs automatic data distribution and generates SPMD programs with message-passing primitives for Cell. We eval
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