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Titlebook: Computer Engineering and Technology; 23rd CCF Conference, Weixia Xu,Liquan Xiao,Zhenzhen Zhu Conference proceedings 2019 Springer Nature Si

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https://doi.org/10.37307/b.978-3-503-23627-5n this paper, we propose a retransmission mechanism for many-core processor using dynamic pipeline and static flow control, which can break the deadlock caused by sharing channel on 2D mesh NOC. The configuration of key parameters in this retransmission mechanism is given by modeling. The modeling a
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Motor vehicle tax harmonizationh parallelism and large amount of computations. With the rapid development of AI applications, general purpose processors such as CPU/GPU can’t meet the requirements for performance, power consumption and real-time performance of CNN. However, ASIC can fully exploit the parallelism of CNN and improv
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Tax Coordination in the European Communitym cyclic testing system called RCTS is designed for multi-core and heterogeneous many-core processors. RCTS supports FPGA verification and can verify hardware logic and integrated implementation at design stage. RCTS also supports the verification of prototype chips. Especially in the system-level h
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Tax harmonisation and labour mobility systems. Currently, many research institutions and companies publish various RISC-V processor cores. One of the most important feature of processors is the ability to response to interrupt events. This paper studies the interrupt mechanism of Hummingbird e203, which is an open-source RISC-V process
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