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Titlebook: Computer Aided Verification; 29th International C Rupak Majumdar,Viktor Kunčak Conference proceedings 2017 Springer International Publishin

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Towards Verifying Nonlinear Integer Arithmeticution proofs for many properties of the most widely used multiplier circuits. Such short proofs were conjectured not to exist. More precisely, we give . size regular resolution proofs for arbitrary degree 2 identities on array, diagonal, and Booth multipliers and . size proofs for these identities on Wallace tree multipliers.
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Verified Compilation of Space-Efficient Reversible Circuits quantum computing. Existing tools compile and optimize reversible circuits for various metrics, such as the overall circuit size or the total amount of space required to implement a given function reversibly. However, little effort has been spent on verifying the correctness of the results, an issu
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Ascertaining Uncertainty for Efficient Exact Cache Analysishits and which result in cache misses. Such information is valuable in optimizing compilers, worst-case execution time analysis, and side-channel attack quantification and mitigation..Cache analysis is usually performed as a combination of “must” and “may” abstract interpretations, classifying instr
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Non-polynomial Worst-Case Analysis of Recursive Programsound and complete for proving termination and worst-case bounds of non-recursive programs. First, we apply ranking functions to recursion, resulting in measure functions, and show that they provide a sound and complete approach to prove worst-case bounds of non-deterministic recursive programs. Our
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