Titlebook: Code Optimization Techniques for Embedded Processors; Methods, Algorithms, Rainer Leupers Book 2000 Springer Science+Business Media Dordrec

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Register Allocation for DSP Data Paths,uch architectures has to be performed carefully in order to achieve high code quality. In particular, this holds if code is generated for ., which are a widespread internal representation of program blocks. Such data flow graphs are composed of data flow trees, for which satisfactory code generation

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Performance Optimization with Conditional Instructions,tures of embedded processors. In contrast, this chapter describes a largely machine-independent code optimization technique, which primarily works on the intermediate representation (IR) level of the compilation flow (fig. 6.1).

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Function Inlining under Code Size Constraints, well-known concept in compiler construction. Function inlining eliminates function call overhead by replacing function calls with copies of function bodies. While this optimization generally results in higher performance, it also increases the code size.

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Conclusions,ile compiler technology is relatively mature for general-purpose processors, this generally is not the case for embedded processors. The reason is that embedded systems require higher code efficiency than general-purpose systems. Simultaneously, recent embedded processors show specialized architectu

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Book 2000 in order to make compilers useful in practice. In turn, this requires new compiler techniques that take the specific constraints in embedded system de­ sign into account. An example are the specialized architectures of recent DSP and multimedia processors, which are not yet sufficiently exploited by existing compilers.

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