Titlebook: Applied Computer Sciences in Engineering; 6th Workshop on Engi Juan Carlos Figueroa-García,Mario Duarte-González, Conference proceedings 20

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Evaluation of Stencil Based Algorithm Parallelization over System-on-Chip FPGA Using a High Level Sys used the two-dimensional Laplace equation implemented on a ZedBoard and an Ultra96 board using Vivado HLS. The performance is evaluated according to the amount of inner loop divisions and the on-chip memory partitions, in terms of the latency, power consumption, use of FPGA resources, and speed-up

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Performance Evaluation of SoC-FPGA Based Floating-Point Implementation of GMM for Real-Time Backgrout Kit, considering requirements as hardware resources and power consumption used. Also, performance comparisons among a PC-based, ARM, FPGA and SOC-FPGA implementations are presented. The results showed that frame rates needed for real-time video processing were reached.

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Strength

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Optical Mark Recognition Based on Image Processing Techniques for the Answer Sheets of the Colombianine an adequate number of images to verify the performance of the method in the scenario of the application Saber 11 in the second semester of 2018. The conclusion of the exercise, with around 65.000 images, was 99.7% of accuracy, which was run in an 8 logical processors pc architecture, getting an

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Limited

Path Tracking Control for Micro-robots with Helmholtz-Maxwell Coils ActuationThis work is dedicated to present a proposed control system for tridimensional and planar position of a magnetized micro-robot on a high viscous medium with electromagnetic actuation. Detailed process for control derivation, simulation and experiments are exposed.

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