Overview: Provides overview of various, existing homogeneous/heterogeneous architectures, cache and memory structures, on-chip interconnects, etc. and explains why current programming models won’t scale when th.This book presents new concepts, techniques and promising programming models for designing software for chips with "many" (hundreds to thousands) processor cores. Given the scale of parallelism inherent to these chips, software designers face new challenges in terms of operating systems, middleware and applications. This will serve as an invaluable, single-source reference to the state-
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