Titlebook: Verilog® Quickstart; James M. Lee Book 1997 Springer Science+Business Media New York 1997 Hardware.Verilog.debugging.model.modeling.simula

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Parameterized Modules,ater. You can use the same parameterized adder as a 5-bit adder in one place and as a 64-bit adder elsewhere. Parameters are often used to describe the word size of a module, the number of words in a memory, or even delays. Delays are more commonly set up with a . block that can be annotated with actual delays from an SDF file.

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Modeling Tips,s possible to create models in Verilog that are neither combinatorial or sequential. (However, if a model is neither sequential nor combinatorial it may not be possible to built it in actual hardware.) This chapter provides modeling rules for both combinatorial as well as sequential circuits.

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Debugging a Design,exact sequence of events, look at values buried within the circuit, and even see what is driving a multiply driven signal. It takes technique, strategy, and experience to find errors quickly and correct them. This chapter explains a few basic techniques and provides strategies for when to apply those techniques.

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Introduction to the Verilog Language,In this chapter we will look at some of the formal definitions of the Verilog language: identifiers, white space, comments, numbers, text macros, modules, value set, and strengths.

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Common Errors,Before moving on to chapter 14, which covers debugging, it may save some time to look at some of the common modeling errors and how to correct them.

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978-1-4613-7801-3Springer Science+Business Media New York 1997