| 书目名称 | VLSI Planarization | | 副标题 | Methods, Models, Imp | | 编辑 | V. Feinberg,A. Levin,E. Rabinovich | | 视频video | | | 丛书名称 | Mathematics and Its Applications | | 图书封面 |  | | 描述 | At the beginning we would like to introduce a refinement. The term ‘VLSI planarization‘ means planarization of a circuit of VLSI, Le. the embedding of a VLSI circuit in the plane by different criteria such as the minimum number of connectors, the minimum total length of connectors, the minimum number of over-the-element routes, etc. A connector is designed to connect the broken sections of a net. It can be implemented in different ways depending on the technology. Connectors for a bipolar VLSI are implemented by diffused tun nels, for instance. By over-the-element route we shall mean a connection which intersects the enclosing rectangle of an element (or a cell). The possibility of the construction such connections during circuit planarization is reflected in element models and can be ensured, for example, by the availability of areas within the rectangles where connections may be routed. VLSI planarization is one of the basic stages (others will be discussed below) of the so called topological (in the mathematical sense) approach to VLSI design. This approach does not lie in the direction of the classical approach to automation of VLSI layout design. In the classical approach to | | 出版日期 | Book 1997 | | 关键词 | Hypergraph; Mathematica; VLSI; algorithms; circuit; complexity; complexity theory; computer; development; gra | | 版次 | 1 | | doi | https://doi.org/10.1007/978-94-011-5740-7 | | isbn_softcover | 978-94-010-6421-7 | | isbn_ebook | 978-94-011-5740-7 | | copyright | Springer Science+Business Media Dordrecht 1997 |
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发表于 2025-3-21 16:40:14
