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Titlebook: Unifying Theories of Programming; Second International Andrew Butterfield Conference proceedings 2010 Springer-Verlag Berlin Heidelberg 201

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Transaction Calculus, long-running transactions. This paper presents a design model for specifying the behaviour of compensable programs. The new model for handling exception and compensation is built as conservative extension of the standard relational model. The paper puts forward a mathematical framework for transact
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UTP and Temporal Logic Model Checking,Unifying Theories of Programming (UTP). Our perspective emphasizes the use of UTP designs, an alphabetised relational calculus expressed as a pre/post condition pair of relations, to verify state or temporal assertions about programs. The temporal model checking relation is derived from a satisfacti
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A Note on Traces Refinement and the , Relation in the Unifying Theories of Programming,able in the failures-divergences model; the UTP theory is richer and can be used to give semantics to data-rich process algebras like .. Previously, we have defined functions that calculate the failures-divergences model of a CSP process characterised by a UTP relation. In this note, we use these fu
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Reasoning about Loops in Total and General Correctness,gebra. We demonstrate its utility in verifying the familiar loop-invariant rule for refining a total-correctness specification by a while loop. Total correctness equates non-termination with completely chaotic behaviour, with the consequence that any situation which admits non-termination must also
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Monadic Maps and Folds for Multirelations in an Allegory,nsformer semantics to algebraic semantics and the derivation of programs by calculation, as used in functional programming and relational program development. Two common ways to characterise iteration, namely the functional programming operators . and ., are extended to multirelations, using concept
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Unifying Theories of Interrupts,ations to model failure, or to describe complex interactions between non co-operating components. It is frequently used in hardware to allow complex scheduling patterns. Although interrupts are ubiquitous in usage, the precise behaviour of a system incorporating interrupts can be difficult to reason
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