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Titlebook: Silicon Implementation of Pulse Coded Neural Networks; Mona E. Zaghloul,Jack L. Meador,Robert W. Newcomb Book 1994 Kluwer Academic Publish

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楼主: 矜持
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Pulse Coded Winner-Take-All Networks, be efficiently implemented in VLSI. The manner in which the network not only selects the winner but also indicates the weight of the decision made is unique among established winner-take-all networks. A combination of all-ornothing and graded responses is encoded as a variable rate pulse train appe
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Realization of Boolean Functions Using a Pulse Coded Neuron,ay digital computers could be implemented using pulse-coded neural networks. The result uses an adjustable pulse coded neuron that is realized with a neural-type cell in each of the two input branches and one in the output branch. These neural type cells allow for the adjustment of pulse repetition
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Low-Power Silicon Neurons, Axons and Synapses, component of portable computing devices that require real-world visual or auditory input. The silicon neural design style presented in [., .] naturally supports low-power VLSI design; in this design style, MOS transistors typically operate in the weak-inversion regime. The low-power performance of
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An Unsupervised Neural Processor,ontinuously adapt to the data sensed from a dynamic environment. The first stage of such a controller is a system implementing an unsupervised learning rule that generates linearly separable representations that capture important statistical information from the inputs..We describe the design and te
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ming topics...This ordering of topics is well adjusted to prepare students to subsequent upper-level courses in data structure or algorithm design and implementation. The approach is illuminated by numerous code snippets and the students’ understanding is consolidated by about 250 exercises covering
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