| 书目名称 | Sequential Logic Synthesis |
| 编辑 | Pranav Ashar,Srinivas Devadas,A. Richard Newton |
| 视频video | |
| 丛书名称 | The Springer International Series in Engineering and Computer Science |
| 图书封面 |  |
| 描述 | 3. 2 Input Encoding Targeting Two-Level Logic . . . . . . . . 27 3. 2. 1 One-Hot Coding and Multiple-Valued Minimization 28 3. 2. 2 Input Constraints and Face Embedding 30 3. 3 Satisfying Encoding Constraints . . . . . . . 32 3. 3. 1 Definitions . . . . . . . . . . . . . . . 32 3. 3. 2 Column-Based Constraint Satisfaction 33 3. 3. 3 Row-Based Constraint Satisfaction . . 37 3. 3. 4 Constraint Satisfaction Using Dichotomies . 38 3. 3. 5 Simulated Annealing for Constraint Satisfaction 41 3. 4 Input Encoding Targeting Multilevel Logic. . 43 3. 4. 1 Kernels and Kernel Intersections . . . 44 3. 4. 2 Kernels and Multiple-Valued Variables 46 3. 4. 3 Multiple-Valued Factorization. . . . . 48 3. 4. 4 Size Estimation in Algebraic Decomposition . 53 3. 4. 5 The Encoding Step . 54 3. 5 Conclusion . . . . . . . . . 55 4 Encoding of Symbolic Outputs 57 4. 1 Heuristic Output Encoding Targeting Two-Level Logic. 59 4. 1. 1 Dominance Relations. . . . . . . . . . . . . . . . 59 4. 1. 2 Output Encoding bythe Derivation of Dominance Relations . . . . . . . . . . . . . . . . . . . . . 60 . . 4. 1. 3 Heuristics to Minimize the Number of Encoding Bits . . . . . . . . . . . . 64 4. 1. 4 Disjunctive Relation |
| 出版日期 | Book 1992 |
| 关键词 | VLSI; algorithms; automata; complexity; computer; computer-aided design (CAD); interconnect; logic; modeling |
| 版次 | 1 |
| doi | https://doi.org/10.1007/978-1-4615-3628-4 |
| isbn_softcover | 978-1-4613-6613-3 |
| isbn_ebook | 978-1-4615-3628-4Series ISSN 0893-3405 |
| issn_series | 0893-3405 |
| copyright | Springer Science+Business Media New York 1992 |
发表于 2025-3-21 17:10:23
