Titlebook: Reconfigurable Computing: Architectures, Tools and Applications; 8th International Sy Oliver C. S. Choy,Ray C. C. Cheung,Kentaro Sano Confe

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Domain-Specific Language and Compiler for Stencil Computation on FPGA-Based Systolic Computational-M (SCMA). In DSLSC, we can program stencil computations by describing their mathematical form instead of writing explicit procedure optimally. The compiler automatically parallelizes stencil computations for processing elements (PEs) of SCMA, and schedules multiply-and-add operations for PEs consider

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Heterogeneous Systems for Energy Efficient Scientific Computingematically automate finding solutions for such engines that maximize energy efficiency while meeting requirements in throughput and in resource constraints. The proposed approach, based on a linear programming model, enables optimization of system throughput and energy efficiency, and analysis of en

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The Q2 Profiling Framework: Driving Application Mapping for Heterogeneous Reconfigurable Platformst use of different processing elements. Various criteria can drive this mapping, such as computational intensity, memory requirements, and area consumption. In order to facilitate this complex mapping task, there is a clear need for tools that investigate the use of such critical resources, like mem

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PPMC: A Programmable Pattern Based Memory Controllerhe functionality of the memory controller between the external memory and the accelerators is therefore critical. In this paper, we advance toward this goal by proposing PPMC, the Programmable Pattern-based Memory Controller. This controller supports scatter-gather and strided 1D, 2D and 3D accesses

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