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Titlebook: Optimized ASIP Synthesis from Architecture Description Language Models; Oliver Schliebusch,Heinrich Meyr,Rainer Leupers Book 2007 Springer

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发表于 2025-3-21 16:21:00 | 显示全部楼层 |阅读模式
书目名称Optimized ASIP Synthesis from Architecture Description Language Models
编辑Oliver Schliebusch,Heinrich Meyr,Rainer Leupers
视频video
概述Closes the gap between flexibility and performance in today’s processor design.Efficient and comprehensive ASIP design methodology.In deep information how new implementation flows work / should work
图书封面Titlebook: Optimized ASIP Synthesis from Architecture Description Language Models;  Oliver Schliebusch,Heinrich Meyr,Rainer Leupers Book 2007 Springer
描述.New software tools and a sophisticated methodology above RTL are required to answer the challenges of designing an optimized application specific processor (ASIP). This book offers an automated and fully integrated implementation flow and compares it to common implementation practice. Case-studies emphasise that neither the architectural advantages nor the design space of ASIPs are sacrificed for an automated implementation. Realizing a building block which fulfils the requirements on programmability and computational power is now efficiently possible for the first time...Optimized ASIP Synthesis from Architecture Description Language Models. inspires hardware designers as well as application engineers to design powerful ASIPs that will make their SoC designs unique..
出版日期Book 2007
关键词ASIP (Application Specific Instruction-Set Processor); Attribut; Extreme Programming; Hardware; custom p
版次1
doihttps://doi.org/10.1007/978-1-4020-5686-4
isbn_softcover978-90-481-7428-7
isbn_ebook978-1-4020-5686-4
copyrightSpringer Science+Business Media B.V. 2007
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nformation how new implementation flows work / should work.New software tools and a sophisticated methodology above RTL are required to answer the challenges of designing an optimized application specific processor (ASIP). This book offers an automated and fully integrated implementation flow and co
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https://doi.org/10.1007/978-1-4020-5686-4ASIP (Application Specific Instruction-Set Processor); Attribut; Extreme Programming; Hardware; custom p
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LISA FRONTEND,This chapter discusses the LISA language elements with regard to the generation of an RTL hardware model. The information contained in a LISA model is sufficient to generate a . RTL hardware model as well as to automatically perform optimizations. Thus all requirements discussed in section 4.1 can be satisfied.
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CASE STUDY: AN ASIP FOR TURBO DECODING,Over several years Turbo decoding implementations have been exclusively realized using ASIC designs. However, even in this application domain which is characterized by very high data throughput requirements, the benefits of programmable solutions are wanted.
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