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Titlebook: Latchup in CMOS Technology; The Problem and Its Ronald R. Troutman Book 1986 Springer-Verlag US 1986 CMOS.Potential.VLSI.Wafer.stability

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书目名称Latchup in CMOS Technology
副标题The Problem and Its
编辑Ronald R. Troutman
视频video
丛书名称The Springer International Series in Engineering and Computer Science
图书封面Titlebook: Latchup in CMOS Technology; The Problem and Its  Ronald R. Troutman Book 1986 Springer-Verlag US 1986 CMOS.Potential.VLSI.Wafer.stability
描述Why a book on Iatchup? Latchup has been, and continues to be, a potentially serious CMOS reliability concern. This concern is becoming more widespread with the ascendency of CMOS as the dominant VLSI technology, particularly as parasitic bipolar characteristics continue to improve at ever smaller dimensions on silicon wafers with ever lower defect densities. Although many successful parts have been marketed, latchup solutions have often been ad hoc. Although latchup avoidance techniques have been previously itemized, there has been little quantitative evaluation of prior latchup fixes. What is needed is a more general, more systematic treatment of the latchup problem. Because of the wide variety of CMOS technologies and the long term interest in latchup, some overall guiding principles are needed. Appreciating the variety of possible triggering mechanisms is key to a real understanding of latchup. This work reviews the origin of each and its effect on the parasitic structure. Each triggering mechanism is classified according to a new taxonomy.
出版日期Book 1986
关键词CMOS; Potential; VLSI; Wafer; stability
版次1
doihttps://doi.org/10.1007/978-1-4757-1887-4
isbn_softcover978-1-4419-5199-1
isbn_ebook978-1-4757-1887-4Series ISSN 0893-3405
issn_series 0893-3405
copyrightSpringer-Verlag US 1986
The information of publication is updating

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978-1-4419-5199-1Springer-Verlag US 1986
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Latchup Overview,CMOS circuits cannot accidentally latch if they operate solely in SAFE space. Before beginning a survey to delineate the boundaries of this arcane territory and to explore its interior and neighboring regions, we shall take a brief excursion to familiarize ourselves with the terrain.
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https://doi.org/10.1007/978-1-4757-1887-4CMOS; Potential; VLSI; Wafer; stability
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