Titlebook: Intelligent Computing in Control and Communication; Proceeding of the Fi G.T. Chandra Sekhar,H. S. Behera,Danilo Pelusi Conference proceedi

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Optimal Scheduling for Delay Management in Railway Network Using Hybrid Bat Algorithm,trous situation. Here, multiple tracks and platforms are taken into account to dynamically update the timetable. A Bat Algorithm (BA) based meta-heuristic approach is proposed to solve it. The results obtained from the proposed approach depicts that it can readily solve such problems in an efficient

Flounder

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Adiabatic Logic-Based Area- and Energy-Efficient Full Adder Design,-time applications. Full adders are essential functional elements in complex arithmetic circuits; a 1-bit adder is developed by using adiabatic logic in this operation to get low power consumption. The intended 1-bit adder cell with adiabatic logic results in very less heat dissipation with its surr

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Algorithms,the effect of dumping waste and toward incineration. In this paper, we proposed a balanced material demand-based plastic waste management optimization model, and the following model results in the economic parameters on different stages of recycling. The model primarily depends on the demand of by-p

PHONE

Breaking Down and Reduplication of Information in Cloud for Best Overall Performance and Protectionrst. All the data will be stored in a third-party location and retrieve whenever the user wants to access it. In order to achieve this, we came up with “Disintegration and reduplication of data in cloud for safety and security.” In this methodology, when the user sends the file on the cloud server i

出生

A Novel Modulating PID Controller for a Speed Control of BLDC Motor Adopting Flower Pollination Algof proportional plus integral plus derivative (PID) controller uses Flower Pollination Algorithm (FPA) as an optimization technique. It progresses the transient response of the motor by comparing the terms of rise time (.), peak overshoot (%.), and settling time (.). The three gains (proportional (.

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Improved Harmonic Profile of Multilevel Inverter Topology with Shifted Carrier Modulation Technique desired for an application. It is also desired to avoid various other issues including voltage stress on individual power switches, complexity of the inverter design, voltage balancing at the capacitors, etc. This has been a constant goal for various power electronic research works and numerous top