Titlebook: Intelligent Computing and Communication; Proceedings of 3rd I Vikrant Bhateja,Suresh Chandra Satapathy,V. N. Man Conference proceedings 202

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CMOS-Based XOR Gate Design for Full Swing Output Voltage and Minimum Power Delay Product (PDP),stigated in terms of full swing output voltage, total power dissipation and computational delay using Pyxis Schematics Tool of Mentor Graphics. The Simulation is based on TSMC018 CMOS technology model file.

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2194-5357 applications to provide design, analysis, and modeling for kThis book features a collection of high-quality, peer-reviewed papers presented at the Third International Conference on Intelligent Computing and Communication (ICICC 2019) held at the School of Engineering, Dayananda Sagar University, Ben

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