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Titlebook: Informatik; Festschrift zum 60. Johannes Buchmann,Harald Ganzinger,Wolfgang J. Pau Textbook 1992 Springer Fachmedien Wiesbaden 1992 Algebr

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The Bisection Problem for Graphs of Degree 4 (Configuring Transputer Systems),the bisection width of . . is at least . . .. It this paper some upper bounds on the . .′s are found. Let . . . be the maximum of bisection widths of all .-degree graphs of . vertices. We prove that . for all even .. This result is improved for . = 4 by constructing two algorithms . and ., where for
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Complexity of Closeness, Sparseness and Segment Equivalence for Context-Free and Regular Languages, be shown that the closeness problem for context-free grammars (CFGs) is undecidable while it is .-complete for nondeterministic finite automata (NFAs) and .-complete for deterministic finite automata (DFAs). The segment equivalence problems for CFGs and NFAs are co-.-complete. It is .-complete for
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Communication Complexity and Lower Bounds for Sequential Computation,ication concerns one-tape Turing machines with an additional oneway input tape. It is shown that lower bounds on the Communication Complexity of a given language immediately imply lower bounds on the running time for this Turing machine model. Consequently, lower bounds for the Turing machine comple
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On the Stack Size of a Class of Backtrack Trees,uced by P.W.Purdom for the purpose of modelling backtrack trees. The considered trees have a height less than or equal to . and their shapes are controlled by an external parameter . ∈ [0,1]..We show that the average stack size of a tree appearing in ..(.) is bounded by a constant for 0 ≤ . < ½, and
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,Über die relativistische Struktur logischer Zeit in verteilten Systemen,, ist dadurch charakterisiert, daß a priori kein Prozeß eine konsistente Sicht des globalen Zustandes besitzt und eine gemeinsame Zeitbasis innerhalb des Systems nicht existiert. Interpretiert man nun den Zeitbegriff neu — als eine halbgeordnete Menge .dimensionaler Vektoren mit Verbandstruktur — so
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A Hierarchy Preserving Hierarchical Bottom-Up 2-layer Wiring Algorithm with Respect to Via Minimizalayer wiring of . which needs a number of vias minimal with respect to the preservation of hierarchy, i.e., on condition that the description of the result is (nearly) as short as the description of . before the 2-layer wiring”. The problem arises in connection with hierarchical physical synthesis,
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