Titlebook: High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip; Zheng Wang,Anupam Chattopadhyay Book 2018 Springe

obesity

书目名称High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip影响因子(影响力)




书目名称High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip影响因子(影响力)学科排名




书目名称High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip网络公开度




书目名称High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip网络公开度学科排名




书目名称High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip被引频次




书目名称High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip被引频次学科排名




书目名称High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip年度引用




书目名称High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip年度引用学科排名




书目名称High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip读者反馈




书目名称High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip读者反馈学科排名

ANNUL

Arboreal

2367-3478 o presents a survey of state-of-the-art problems and solutions, offering insights into reliability issues in digital design and their cross-layer countermeasures. .978-981-10-9321-0978-981-10-1073-6Series ISSN 2367-3478 Series E-ISSN 2367-3486

违法事实

Architectural Reliability Exploration,he feature of unequal error protection based on information criticality. In Sect. . error confinement technique is proposed to correct errors in memory with statistical data, which reaches similar protection level with faster performance and less power consumption than traditional techniques.

壮观的游行

infarct

傲慢人

Zheng Wang,Anupam ChattopadhyayOffers a systematic approach to high-level reliability estimation and exploration.Presents step-by-step procedures for 11 novel techniques and solutions.Includes more than 100 figures and illustration

增强

针叶

Introduction,The last few decades have witnessed continuous scaling of CMOS technology, guided by Moore’s Law [136] (G.E. Moore, 38(8), 114 ff, 1965. IEEE Solid-State Circuits Newsl., 3(20), 33–35, 2006), to support devices with higher speed, less area, and less power.

加剧

Background,In this chapter, fundamental knowledge on reliability are discussed, including reliability definition, fault classification and fault models. In the next soft error and its evaluation metrics are elaborated, which is heavily used in the following chapters.