书目名称 | High Performance Multi-Channel High-Speed I/O Circuits |
编辑 | Taehyoun Oh,Ramesh Harjani |
视频video | |
概述 | Describes technology and design ideas for power-efficient crosstalk cancellation in multi-channel high-speed I/O circuits.Includes critical background knowledge related to channel ISI equalization cir |
丛书名称 | Analog Circuits and Signal Processing |
图书封面 |  |
描述 | This book describes design techniques that can be used to mitigate crosstalk in high-speed I/O circuits. The focus of the book is in developing compact and low power integrated circuits for crosstalk cancellation, inter-symbol interference (ISI) mitigation and improved bit error rates (BER) at higher speeds. This book is one of the first to discuss in detail the problem of crosstalk and ISI mitigation encountered as data rates have continued beyond 10Gb/s. Readers will learn to avoid the data performance cliff, with circuits and design techniques described for novel, low power crosstalk cancellation methods that are easily combined with current ISI mitigation architectures. |
出版日期 | Book 2014 |
关键词 | Analog Circuits and Signal Processing; Channel Inter-Symbol Interference; Crosstalk Cancellation and S |
版次 | 1 |
doi | https://doi.org/10.1007/978-1-4614-4963-8 |
isbn_softcover | 978-1-4939-5422-3 |
isbn_ebook | 978-1-4614-4963-8Series ISSN 1872-082X Series E-ISSN 2197-1854 |
issn_series | 1872-082X |
copyright | Springer Science+Business Media New York 2014 |