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Titlebook: Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing; From Algorithm to Ar Chenxin Zhang,Liang Liu,Viktor Öwall Book 2

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发表于 2025-3-21 16:03:55 | 显示全部楼层 |阅读模式
书目名称Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing
副标题From Algorithm to Ar
编辑Chenxin Zhang,Liang Liu,Viktor Öwall
视频video
概述Discusses reconfigurable architectures, including hardware building blocks such as processing elements, memory sub-systems, Network-on-Chip (NoC), and dynamic hardware reconfiguration;.Describes a uni
图书封面Titlebook: Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing; From Algorithm to Ar Chenxin Zhang,Liang Liu,Viktor Öwall Book 2
描述This book focuses on domain-specific heterogeneous reconfigurable architectures, demonstrating for readers a computing platform which is flexible enough to support multiple standards, multiple modes, and multiple algorithms. The content is multi-disciplinary, covering areas of wireless communication, computing architecture, and circuit design. The platform described provides real-time processing capability with reasonable implementation cost, achieving balanced trade-offs among flexibility, performance, and hardware costs. The authors discuss efficient design methods for wireless communication processing platforms, from both an algorithm and architecture design perspective. Coverage also includes computing platforms for different wireless technologies and standards, including MIMO, OFDM, Massive MIMO, DVB, WLAN, LTE/LTE-A, and 5G.
出版日期Book 2016
关键词Domain-specific heterogeneous reconfigurable computing; Heterogeneous Reconfigurable Processors; Netwo
版次1
doihttps://doi.org/10.1007/978-3-319-24004-6
isbn_ebook978-3-319-24004-6
copyrightSpringer International Publishing Switzerland 2016
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发表于 2025-3-21 21:23:32 | 显示全部楼层
Chenxin Zhang,Liang Liu,Viktor ÖwallDiscusses reconfigurable architectures, including hardware building blocks such as processing elements, memory sub-systems, Network-on-Chip (NoC), and dynamic hardware reconfiguration;.Describes a uni
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Digital Hardware Platforms,from a few thousands to billions to date. This trend was already observed in 1965 [15] by Intel’s co-founder Gordon E. Moore and later came to be known as “Moore’s law” coined by Carver Mead. Moore’s law has held true since then and is a driving force of the advancements of Very-large-scale integration (VLSI) design [11].
发表于 2025-3-23 01:50:13 | 显示全部楼层
Conclusion,to accomplish current computational demands. In addition, hardware efficiency with respect to area and power consumption is substantially improved in comparison to FPGAs, thanks to the word-level data manipulations.
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