| 书目名称 | Hardware Acceleration of EDA Algorithms | | 副标题 | Custom ICs, FPGAs an | | 编辑 | Kanupriya Gulati,Sunil P. Khatri | | 视频video | | | 概述 | Provides guidelines on whether to use GPUs or FPGAs when accelerating a given EDA algorithm, with validation by a concrete example implemented on both platforms.Demonstrates the acceleration of severa | | 图书封面 |  | | 描述 | Single-threaded software applications have ceased to see signi?cant gains in p- formance on a general-purpose CPU, even with further scaling in very large scale integration (VLSI) technology. This is a signi?cant problem for electronic design automation (EDA) applications, since the design complexity of VLSI integrated circuits (ICs) is continuously growing. In this research monograph, we evaluate custom ICs, ?eld-programmable gate arrays (FPGAs), and graphics processors as platforms for accelerating EDA algorithms, instead of the general-purpose sing- threaded CPU. We study applications which are used in key time-consuming steps of the VLSI design ?ow. Further, these applications also have different degrees of inherent parallelism in them. We study both control-dominated EDA applications and control plus data parallel EDA applications. We accelerate these applications on these different hardware platforms. We also present an automated approach for accelerating certain uniprocessor applications on a graphics processor. This monograph compares custom ICs, FPGAs, and graphics processing units (GPUs) as potential platforms to accelerate EDA algorithms. It also provides details of the | | 出版日期 | Book 2010 | | 关键词 | FPGA; Field Programmable Gate Array; algorithms; architecture; computer-aided design (CAD); integrated ci | | 版次 | 1 | | doi | https://doi.org/10.1007/978-1-4419-0944-2 | | isbn_softcover | 978-1-4899-8333-6 | | isbn_ebook | 978-1-4419-0944-2 | | copyright | Springer-Verlag US 2010 |
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发表于 2025-3-21 17:48:17
