| 书目名称 | Formal Verification of Floating-Point Hardware Design |
| 副标题 | A Mathematical Appro |
| 编辑 | David M. Russinoff |
| 视频video | http://file.papertrans.cn/346/345955/345955.mp4 |
| 概述 | Unified theory of register-transfer logic and computer arithmetic.Comparative analysis of sophisticated hardware solutions.Verification methodology combining theorem proving with equivalence checking |
| 图书封面 |  |
| 描述 | .This is the first book to focus on the problem of ensuring the correctness of floating-point hardware designs through mathematical methods. .Formal Verification of Floating-Point Hardware Design, Second Edition. advances a verification methodology based on a unified theory of register-transfer logic and floating-point arithmetic that has been developed and applied to the formal verification of commercial floating-point units over the course of more than two decades, during which the author was employed by several major microprocessor design companies. The theory is extended to the analysis of several algorithms and optimization techniques that are commonly used in commercial implementations of elementary arithmetic operations. .As a basis for the formal verification of such implementations, high-level specifications of the basic arithmetic instructions of several major industry-standard floating-point architectures are presented, including all details pertaining to the handling of exceptional conditions. The methodology is illustrated in the comprehensive verification of a variety of state-of-the-art commercial floating-point designs developed by Arm Holdings..This revised edition |
| 出版日期 | Book 2022Latest edition |
| 关键词 | floating-point arithmetic; interactive theorem proving; register-transfer logic; formal verification; co |
| 版次 | 2 |
| doi | https://doi.org/10.1007/978-3-030-87181-9 |
| isbn_softcover | 978-3-030-87183-3 |
| isbn_ebook | 978-3-030-87181-9 |
| copyright | The Editor(s) (if applicable) and The Author(s), under exclusive license to Springer Nature Switzerl |
|Archiver|手机版|小黑屋|
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