书目名称 | FPGA-BASED Hardware Accelerators |
编辑 | Iouliia Skliarova,Valery Sklyarov |
视频video | |
概述 | The book describes design and implementations of FPGA (Field-Programmable Gate Arrays)/PSoC (Programmable Systems-on-Chip) hardware accelerators.Focus is on hardware accelerators for data/information |
丛书名称 | Lecture Notes in Electrical Engineering |
图书封面 |  |
描述 | .This book suggests and describes a number of fast parallel circuits for data/vector processing using FPGA-based hardware accelerators. Three primary areas are covered: searching, sorting, and counting in combinational and iterative networks. These include the application of traditional structures that rely on comparators/swappers as well as alternative networks with a variety of core elements such as adders, logical gates, and look-up tables. The iterative technique discussed in the book enables the sequential reuse of relatively large combinational blocks that execute many parallel operations with small propagation delays. For each type of network discussed, the main focus is on the step-by-step development of the architectures proposed from initial concepts to synthesizable hardware description language specifications. Each type of network is taken through several stages, including modeling the desired functionality in software, the retrieval and automatic conversion of key functions, leading to specifications for optimized hardware modules. The resulting specifications are then synthesized, implemented, and tested in FPGAs using commercial design environments and prototyping bo |
出版日期 | Book 2019 |
关键词 | FPGA; Optimization Techniques; Data Processing; Combinatorial Optimization; Hardware Accelerators; Xilinx |
版次 | 1 |
doi | https://doi.org/10.1007/978-3-030-20721-2 |
isbn_softcover | 978-3-030-20723-6 |
isbn_ebook | 978-3-030-20721-2Series ISSN 1876-1100 Series E-ISSN 1876-1119 |
issn_series | 1876-1100 |
copyright | Springer Nature Switzerland AG 2019 |