Titlebook: Emerging Research in Electronics, Computer Science and Technology; Proceedings of Inter V Sridhar,Holalu Seenappa Sheshadri,M C Padma Confe

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https://doi.org/10.1007/978-3-663-01328-0 number of processor cores into one chip. Still the load on the processor is not less in generic system. This load is reduced by supplementing the main processor with coprocessors, which are designed to work upon specific type of functions like numeric computation, signal processing, and graphics. T

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Neues Jahrbuch Dritte Welt 2005curate with less delay. The proposed high-speed reconfigurable coprocessor can be easily implemented using various standard operations such as bit shuffle operation, convolutional encoding, fast Fourier transform, interleaving, modulation, scrambling, shift-XOR array, Viterbi decoding, and several o

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https://doi.org/10.1007/978-3-658-20585-0ty to have a strong authentication to secure all our applications is as possible. In this paper, we present a new approach to authenticate password using Enhanced visual cryptography (EVC). Visual cryptography is a secret sharing scheme in which an image is converted into shares. No information can

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Antibiotica und ChemotherapeuticaADC to processor becomes uneconomical (processor+ memory), inefficient (performance of CPU unused), rigid (lacking repeated customization). Hence, a dedicated piece of hardware which serves the purpose of the interface is needed and FPGAs prove to be one such reliable option due to their features li