| 书目名称 | Designing Asynchronous Circuits using NULL Convention Logic (NCL) | | 编辑 | Scott C. Smith,Jia Di | | 视频video | | | 丛书名称 | Synthesis Lectures on Digital Circuits & Systems | | 图书封面 |  | | 描述 | Designing Asynchronous Circuits using NULL Convention Logic (NCL) begins with an introduction to asynchronous (clockless) logic in general, and then focuses on delay-insensitive asynchronous logic design using the NCL paradigm. The book details design of input-complete and observable dual-rail and quad-rail combinational circuits, and then discusses implementation of sequential circuits, which require datapath feedback. Next, throughput optimization techniques are presented, including pipelining, embedding registration, early completion, and NULL cycle reduction. Subsequently, low-power design techniques, such as wavefront steering and Multi-Threshold CMOS (MTCMOS) for NCL, are discussed. The book culminates with a comprehensive design example of an optimized Greatest Common Divisor circuit. Readers should have prior knowledge of basic logic design concepts, such as Boolean algebra and Karnaugh maps. After studying this book, readers should have a good understanding of the differencesbetween asynchronous and synchronous circuits, and should be able to design arbitrary NCL circuits, optimized for area, throughput, and power. Table of Contents: Introduction to Asynchronous Logic / Ov | | 出版日期 | Book 2009 | | 版次 | 1 | | doi | https://doi.org/10.1007/978-3-031-79800-9 | | isbn_softcover | 978-3-031-79799-6 | | isbn_ebook | 978-3-031-79800-9Series ISSN 1932-3166 Series E-ISSN 1932-3174 | | issn_series | 1932-3166 | | copyright | Springer Nature Switzerland AG 2009 |
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发表于 2025-3-21 19:21:44
