Titlebook: Design Automation for Differential MOS Current-Mode Logic Circuits; Stéphane Badel,Can Baltaci,Yusuf Leblebici Book 2019 Springer Internat

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Design Example IV: Advanced Encryption Standard (AES)c block. In this implementation, the static power consumption of the MCML gates is reduced by applying the Power Gated MCML (PG-MCML) technique where the current source of the gates is switched off when there is no activity. The example block is implemented by using both MCML and CMOS gates. The pow

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Antonio Sommese,Martin Eberhardgy will be discussed. After introducing the standard-cell approach, methods for constructing optimum MCML logic gates will be presented. An approach to choose efficient functions for a standard-cell library will be proposed, built on the presented analysis framework. Finally, practical issues of standard-cell implementation will be discussed.

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978-3-030-08219-2Springer International Publishing AG, part of Springer Nature 2019

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Antonio Sommese,Martin Eberhardgn of MCML gates is discussed. Trade-offs are analyzed, and a design methodology is proposed. Then, the circuit-level implementation of specific cells is discussed, including sequential (latches, flip-flops) and tri-state circuits. Finally, some variants of the classical MCML style targeting higher

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