Titlebook: DSP Architecture Design Essentials; Dejan Marković,Robert W. Brodersen Book 2012 Springer Science+Business Media New York 2012 Architectur

FLEET

AVOID

Time-Frequency Analysis: FFT and Waveletsll use the FFT and the wavelet transform as our examples for this chapter. The well-known Fast Fourier Transform (FFT) is applicable to the frequency analysis of stationary signals. Wavelets provide a flexible time-frequency grid to analyze signals whose spectral content changes over time.

绕着哥哥问

使坚硬

Wordlength Optimizationthout significant degradation in algorithm performance is an important step in hardware implementation of DSP algorithms. Manual tuning of bits is often performed by designers. Such approach is time-consuming and results in sub-optimal results. This chapter discusses an automated optimization approach.

温顺

微生物

Multi-GHz Radio DSPponents and RF filters that do not scale well with technology, and have poor tunability required for supporting multiple modes of operation. Digital CMOS scales well in power, area, and speed with each new generation, and can be easily programmed to support multiple modes of operation.

祖传

MHz-rate Multi-Antenna Decoders: Dedicated SVD Chip Example power and area for complex signal processing algorithms. As an example, adaptive algorithm for singular value decomposition will be used. Power and area efficiency derived from this example will also be used as a reference for flexibility considerations in Chap. 15.

EXALT

Nmda-Receptor

CORDIC, Divider, Square RootThis chapter studies iterative algorithms for division, square rooting, trigonometric and hyperbolic functions and their baseline architecture. Iterative approaches are suitable for implementing adaptive signal processing algorithms such as those found in wireless communications.

BILK