找回密码
 To register

QQ登录

只需一步,快速开始

扫一扫,访问微社区

Titlebook: Correct Hardware Design and Verification Methods; 11th IFIP WG 10.5 Ad Tiziana Margaria,Tom Melham Conference proceedings 2001 Springer-Ver

[复制链接]
楼主: 助手
发表于 2025-3-23 10:41:54 | 显示全部楼层
Applications of Hierarchical Verification in Model Checkingms to successfully verify a wide spectrum of large and complex circuits. This paper describes a variety of the decomposition techniques that we have used as part of a large industrial formal verification effort on the Intel Pentium® 4 (Willamette) processor.
发表于 2025-3-23 16:42:53 | 显示全部楼层
发表于 2025-3-23 20:46:31 | 显示全部楼层
发表于 2025-3-23 23:58:47 | 显示全部楼层
Efficient Reachability Analysis and Refinement Checking of Timed Automata Using BDDs timed automata [.]. Matrix-based algorithms for the reachability analysis of timed automata are implemented in tools like Kronos, Uppaal, HyTech and Rabbit. A new BDD-based version of Rabbit, which supports also refinement checking, is now available.
发表于 2025-3-24 05:32:51 | 显示全部楼层
Deriving Real-Time Programs from Duration Calculus SpecificationsThe main idea of our approach is to model discretization at state level by introducing the discrete states approximating the continuous ones, and then derive a specification of the control program over discrete states. Then the control program is derived from its specification using an extension of
发表于 2025-3-24 08:10:03 | 显示全部楼层
发表于 2025-3-24 13:00:32 | 显示全部楼层
Formally-Based Design Evaluation Logic in Lotos - the ISO Language Of Temporal Ordering Specification). Relations for (strong) conformance are defined to verify a design specification against a high-level specification. Tools have been developed for automated testing and verification of conformance between an implementation and it
发表于 2025-3-24 17:01:36 | 显示全部楼层
发表于 2025-3-24 19:54:01 | 显示全部楼层
Register Transformations with Multiple Clock Domainsance and power requirements. In this paper, we identify a special case of multiple clocking that encompasses typical design styles, and we present a theory enabling a wide range of register transformations relating to the multiple clock domains. For example, we can perform pipelining, phase abstract
发表于 2025-3-25 00:24:49 | 显示全部楼层
Temporal Properties of Self-Timed Ringst self-timed networks, a ring, and note that for timing applications, self-timed rings should maintain uniform spacing of events. In practice, all previous designs of which we are aware cluster events into bursts. In this paper, we describe a dynamical systems approach to verify the temporal propert
 关于派博传思  派博传思旗下网站  友情链接
派博传思介绍 公司地理位置 论文服务流程 影响因子官网 吾爱论文网 大讲堂 北京大学 Oxford Uni. Harvard Uni.
发展历史沿革 期刊点评 投稿经验总结 SCIENCEGARD IMPACTFACTOR 派博系数 清华大学 Yale Uni. Stanford Uni.
QQ|Archiver|手机版|小黑屋| 派博传思国际 ( 京公网安备110108008328) GMT+8, 2025-8-26 09:39
Copyright © 2001-2015 派博传思   京公网安备110108008328 版权所有 All rights reserved
快速回复 返回顶部 返回列表