Titlebook: Compilers and Operating Systems for Low Power; Luca Benini,Mahmut Kandemir,J. Ramanujam Book 2003 Springer Science+Business Media New York

冰雹

bile648

傻瓜

Propagating Constants Past Software to Hardware Peripherals on Fixed-Application Embedded Systems,sed to initialize control registers in peripheral hardware components. Now that peripherals are often purchased in intellectual property (core) form and synthesized along with the microprocessor onto a single chip, new optimization opportunities exist. We introduce one such optimization, which invol

教唆

Constructive Timing Violation for Improving Energy Efficiency,g violations, based on a speculative execution technique. Since power reduces quadratically with supply voltage, supply voltage reductions can result in substantial power savings. However, these reductions also cause a longer gate delay, and so the clock frequency must be reduced so that timing cons

larder

Power Modeling and Reduction of VLIW Processors, compiler and micro-architecture innovations for power reduction. Using this simulator, we then develop and compare the following techniques with a bounded performance loss of 1% compared to the case without any dynamic throttling: (i) clock ramping with hardware-based prescan ., and (ii) clock ramp

漫不经心

faucet

Static Analysis of Parameterized Loop Nests for Energy Efficient Use of Data Caches, examine efficient utilization of data caches for low power in an adaptive memory hierarchy. We focus on the optimization of data reuse through the static analysis of line size adaptivity. We present an approach that enables the quantification of data misses with respect to cache line size at compil

有机体

天气

https://doi.org/10.1007/978-1-4419-9292-5Embedded Systems; Scheduling; Sensor; communication; evaluation; operating system; processor; tables

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