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Titlebook: Built-in Fault-Tolerant Computing Paradigm for Resilient Large-Scale Chip Design; A Self-Test, Self-Di Xiaowei Li,Guihai Yan,Cheng Liu Book

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发表于 2025-3-21 18:56:31 | 显示全部楼层 |阅读模式
期刊全称Built-in Fault-Tolerant Computing Paradigm for Resilient Large-Scale Chip Design
期刊简称A Self-Test, Self-Di
影响因子2023Xiaowei Li,Guihai Yan,Cheng Liu
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发行地址Presents a built-in on-chip fault-tolerant computing paradigm that can be applied to a variety of VLSI designs.Provides a holistic fault-tolerant solution that enables self-test, self-diagnosis and se
图书封面Titlebook: Built-in Fault-Tolerant Computing Paradigm for Resilient Large-Scale Chip Design; A Self-Test, Self-Di Xiaowei Li,Guihai Yan,Cheng Liu Book
影响因子With the end of Dennard scaling and Moore’s law, IC chips, especially large-scale ones, now face more reliability challenges, and reliability has become one of the mainstay merits of VLSI designs. In this context, this book presents a built-in on-chip fault-tolerant computing paradigm that seeks to combine fault detection, fault diagnosis, and error recovery in large-scale VLSI design in a unified manner so as to minimize resource overhead and performance penalties. Following this computing paradigm, we propose a holistic solution based on three key components: self-test, self-diagnosis and self-repair, or “3S” for short. We then explore the use of 3S for general IC designs, general-purpose processors, network-on-chip (NoC) and deep learning accelerators, and present prototypes to demonstrate how 3S responds to in-field silicon degradation and recovery under various runtime faults caused by aging, process variations, or radical particles. Moreover, we demonstrate that 3S not onlyoffers a powerful backbone for various on-chip fault-tolerant designs and implementations, but also has farther-reaching implications such as maintaining graceful performance degradation, mitigating the imp
Pindex Book 2023
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Fault-Tolerant Network-On-Chip,ince a single routing node failure in NoC can destroy the connectivity of the entire manycore system, NoC is of essential importance to the manycore system. To improve the reliability of NoCs, we investigate fault-tolerant design approaches from different angles including fault-tolerant NoC architec
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Fault-Tolerant Deep Learning Processors,edundancy design approaches typically have each homogeneous redundant processing element (PE) to mitigate faulty PEs for a limited region of the 2-D computing array rather than the entire computing array to avoid the excessive hardware overhead. However, they fail to recover the computing array when
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