Titlebook: Applied Cryptography in Computer and Communications; First EAI Internatio Bo Chen,Xinyi Huang Conference proceedings 2021 ICST Institute fo

Congestion

进取心

阉割

https://doi.org/10.1007/978-981-19-2169-8t) scheme of SM4 is proposed by exploiting the structure property. Moreover, this scheme is further improved by introducing the page-locked memory and CUDA streams. The results show that: SM4 optimized parallel implementation under GPU can obtain with a speed-up ratio of 89, and the throughput can reach up to 31.41 Gbps.