Titlebook: Wafer-Level Integrated Systems; Implementation Issue Stuart K. Tewksbury Book 1989 Kluwer Academic Publishers 1989 Flip-Flop.Generator.Prog

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General Testing Techniques,he emphasis is on general purpose schemes, such as scan path design of VLSI circuits and syndrome test compression. Special purpose testing schemes (e.g. [5,6,7,8]) developed for specific system functions (PLA’s, random access memories, linear matrix operations, etc) are considered separately in the

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Function-Specific Testing,l-purpose testing schemes. Three distinct circuit functions (memory arrays, regular logic arrays and programmable logic arrays) are used as examples of the various techniques which can be used. A major issue for special purpose testing is reduction of the size of the set of test vectors, drawing on

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Physical Restructuring,monolithic IC/WSI circuits. The term “.” is generally here used to represent physical alteration of the circuit interconnection links, including switches along interconnection paths. The alterations may involve addition or deletion of connections between physical interconnections or physical program

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Programmable Electronic Reconfiguration Switches, are prominently used in experimental logic circuits designed for yield enhancement. Figure 10.1 shows the general model of an electronic switch for reconfiguration of interconnections. In addition to the specific switching of an input line . to an output line ., the open/closed state of the switch

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