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Titlebook: Test Generation of Crosstalk Delay Faults in VLSI Circuits; S. Jayanthy,M.C. Bhuvaneswari Book 2019 Springer Science+Business Media Singap

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书目名称Test Generation of Crosstalk Delay Faults in VLSI Circuits
编辑S. Jayanthy,M.C. Bhuvaneswari
视频video
概述Is intended for design engineers and researchers in the field of VLSI and embedded system design.Introduces readers to deterministic and simulation-based algorithms for testing crosstalk delay faults
图书封面Titlebook: Test Generation of Crosstalk Delay Faults in VLSI Circuits;  S. Jayanthy,M.C. Bhuvaneswari Book 2019 Springer Science+Business Media Singap
描述This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing..
出版日期Book 2019
关键词Crosstalk delay faults; Very Large Scale Integration; Deterministic Algorithms; Genetic Algorithm; Fuzzy
版次1
doihttps://doi.org/10.1007/978-981-13-2493-2
isbn_softcover978-981-13-4784-9
isbn_ebook978-981-13-2493-2
copyrightSpringer Science+Business Media Singapore 2019
The information of publication is updating

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