| 书目名称 | Single-Instruction Multiple-Data Execution | | 编辑 | Christopher J. Hughes | | 视频video | | | 丛书名称 | Synthesis Lectures on Computer Architecture | | 图书封面 |  | | 描述 | Having hit power limitations to even more aggressive out-of-order execution in processor cores, many architects in the past decade have turned to single-instruction-multiple-data (SIMD) execution to increase single-threaded performance. SIMD execution, or having a single instruction drive execution of an identical operation on multiple data items, was already well established as a technique to efficiently exploit data parallelism. Furthermore, support for it was already included in many commodity processors. However, in the past decade, SIMD execution has seen a dramatic increase in the set of applications using it, which has motivated big improvements in hardware support in mainstream microprocessors. The easiest way to provide a big performance boost to SIMD hardware is to make it wider—i.e., increase the number of data items hardware operates on simultaneously. Indeed, microprocessor vendors have done this. However, as we exploit more data parallelism in applications, certain challenges can negatively impact performance. In particular, conditional execution, non-contiguous memory accesses, and the presence of some dependences across data items are key roadblocks to achieving pea | | 出版日期 | Book 2015 | | 版次 | 1 | | doi | https://doi.org/10.1007/978-3-031-01746-9 | | isbn_softcover | 978-3-031-00618-0 | | isbn_ebook | 978-3-031-01746-9Series ISSN 1935-3235 Series E-ISSN 1935-3243 | | issn_series | 1935-3235 | | copyright | Springer Nature Switzerland AG 2015 |
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发表于 2025-3-21 18:02:03
