Titlebook: Semiconductor Device Reliability; A. Christou,B. A. Unger Book 1990 Kluwer Academic Publishers 1990 ASIC.CMOS.LED.Laser.Standard.Transisto

愤世嫉俗者

Component Burn-In: The Changing Attitudeent manufacturers now no longer request burn-in of semiconductor components due to the overall improved quality and reliability of components available from most vendors. Also, many have become aware of the inherent dangers of inducing damage in otherwise healthy components in the burn-in area. On t

嬉耍

Statistical Models for Device Reliability; An Overviewhazard rate model, which has proven in many cases to he too simple. A decreasing hazard rate is often observed and this may be modelled in several ways. Furthermore as the submicron technology is emerging wearout phenomena may be observed. The situation is further complicated when more than one fail

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neutralize

使激动

Failure Analysis: The Challengexpedient remedial action is essential (in certain applications, for example military or aerospace, failure cannot be tolerated). Consequently with the advances in these technologies, together with the wide variety of packaging formats used, innovative tools and techniques for failure analysis need d

形状

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妨碍

Failure Mechanisms of GaAs MESFETs and Low-Noise HEMTsdevices manufactured by different technologies. Main failure mechanisms identified are related to gate metallization and Schottky contacts (metal/GaAs interdiffusion, gate electromigration), ohmic contact degradation (increase of contact resistance, drain/source electromigration), surface effects an

GROSS

Metal Contact Degradation on III–V Compound Semiconductorstal contact technology, low parasitic resistance and a high degree of reliability and reproducibility. Self-aligned gate FETs in digital GaAs integrated circuits require gates which must withstand a high temperature anneal treatment. For long term high temperature applications, stable Ohmic contacts

Vulnerable

Nuclear Methods in the Characterization of Semiconductor Reliabilityp and in many cases the results are not well understood. A survey of applications of nuclear techniques for the characterization of the structural and electronic environment of impurity atoms in semiconductors in an atomic scale will be given. The potentialities, sensitivity and limitations of the n