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Titlebook: Scalable Parallel Programming Applied to H.264/AVC Decoding; Ben Juurlink,Mauricio Alvarez-Mesa,Alex Ramirez Book 2012 The Author(s) 2012

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书目名称Scalable Parallel Programming Applied to H.264/AVC Decoding
编辑Ben Juurlink,Mauricio Alvarez-Mesa,Alex Ramirez
视频video
概述Includes supplementary material:
丛书名称SpringerBriefs in Computer Science
图书封面Titlebook: Scalable Parallel Programming Applied to H.264/AVC Decoding;  Ben Juurlink,Mauricio Alvarez-Mesa,Alex Ramirez Book 2012 The Author(s) 2012
描述.Existing software applications should be redesigned if programmers want to benefit from the performance offered by multi- and many-core architectures. Performance scalability now depends on the possibility of finding and exploiting enough Thread-Level Parallelism (TLP) in applications for using the increasing numbers of cores on a chip. .Video decoding is an example of an application domain with increasing computational requirements every new generation. This is due, on the one hand, to the trend towards high quality video systems (high definition and frame rate, 3D displays, etc) that results in a continuous increase in the amount of data that has to be processed in real-time. On the other hand, there is the requirement to maintain high compression efficiency which is only possible with video codes like H.264/AVC that use advanced coding techniques. .In this book, the parallelization of H.264/AVC decoding is presented as a case study of parallel programming. H.264/AVC decoding is an example of a complex application with many levels of dependencies, different kernels, and irregular data structures. The book presents a detailed methodology for parallelization of this type of applic
出版日期Book 2012
关键词H; 264/AVC; HEVC standard; Multicore architectures; Parallel programming; Video decoding
版次1
doihttps://doi.org/10.1007/978-1-4614-2230-3
isbn_softcover978-1-4614-2229-7
isbn_ebook978-1-4614-2230-3Series ISSN 2191-5768 Series E-ISSN 2191-5776
issn_series 2191-5768
copyrightThe Author(s) 2012
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Exploiting Parallelism: the 2D-Wave,second approach, called Ring-Line, full lines of macroblocks are statically assigned to cores and the cores synchronize and communicate point-to-point. Both approaches have been implemented and are evaluated on a dual-chip Cell BE system with 18 cores in total.
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Extracting More Parallelism: the 3D-Wave,ypically short. Experimental results obtained using a simulator of a many-core architecture containing NXP TriMedia TM3270 embedded processors show that the implementation scales very well, achieving a speedup of more than 50 on a 64-core processor for a 25-frame FHD sequence.
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Putting It All Together: A Fully Parallel and Efficient H.264 Decoder, parallel H.264 decoder that is optimized for core counts of future multicore systems and emerging video decoding scenarios. The presented implementation is evaluated on a 40-core cc-NUMA system using 1080p25 and 2160p50 video sequences.
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Understanding the Application: An Overview of the H.264 Standard,rief overview of the state-of-the-art H.264/AVC video coding standard. The H.264/AVC standard is based on the same hybrid structure as previous standards, but contains several new coding tools that increase the coding efficiency and quality. These new features increase the computational complexity o
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