| 书目名称 | On-Chip Networks |
| 编辑 | Natalie Enright Jerger,Li-Shiuan Peh |
| 视频video | |
| 丛书名称 | Synthesis Lectures on Computer Architecture |
| 图书封面 |  |
| 描述 | With the ability to integrate a large number of cores on a single chip, research into on-chip networks to facilitate communication becomes increasingly important. On-chip networks seek to provide a scalable and high-bandwidth communication substrate for multi-core and many-core architectures. High bandwidth and low latency within the on-chip network must be achieved while fitting within tight area and power budgets. In this lecture, we examine various fundamental aspects of on-chip network design and provide the reader with an overview of the current state-of-the-art research in this field. Table of Contents: Introduction / Interface with System Architecture / Topology / Routing / Flow Control / Router Microarchitecture / Conclusions |
| 出版日期 | Book 2009 |
| 版次 | 1 |
| doi | https://doi.org/10.1007/978-3-031-01725-4 |
| isbn_ebook | 978-3-031-01725-4Series ISSN 1935-3235 Series E-ISSN 1935-3243 |
| issn_series | 1935-3235 |
| copyright | Springer Nature Switzerland AG 2009 |
发表于 2025-3-21 18:15:56
