| 书目名称 | Logic Synthesis and Verification Algorithms | | 编辑 | Gary D. Hachtel,Fabio Somenzi | | 视频video | | | 图书封面 |  | | 描述 | .Logic Synthesis and Verification Algorithms. is a textbookdesigned for courses on VLSI Logic Synthesis and Verification, DesignAutomation, CAD and advanced level discrete mathematics. It alsoserves as a basic reference work in design automation for bothprofessionals and students. ..Logic Synthesis and Verification Algorithms. is about thetheoretical underpinnings of VLSI (Very Large Scale IntegratedCircuits). It combines and integrates modern developments in logicsynthesis and formal verification with the more traditional matter ofSwitching and Finite Automata Theory. The book also providesbackground material on Boolean algebra and discrete mathematics. .A unique feature of this text is the large collection of solvedproblems. .Throughout the text the algorithms covered are the subject of one ormore problems based on the use of available synthesis programs. | | 出版日期 | Textbook 1996 | | 关键词 | Automat; Boolean algebra; VLSI; algorithms; automata; formal verification; logic; verification | | 版次 | 1 | | doi | https://doi.org/10.1007/b117060 | | isbn_softcover | 978-1-4757-7036-0 | | isbn_ebook | 978-0-306-47592-4 | | copyright | Springer Science+Business Media New York 1996 |
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发表于 2025-3-21 16:44:18
